This paper explores the potential of sub-threshold Very Large Scale Integration (VLSI) circuits in enhancing energy efficiency for Internet of Things (IoT) applications. By employing advanced techniques such as Adaptive Voltage Scaling (AVS), Multi-Threshold CMOS (MTCMOS), and body biasing, the study addresses key challenges, including increased delay, performance variability, and leakage power. Data is gathered through circuit simulations conducted using tools like Cadence and Synopsys, followed by experimental validation of prototype designs. Descriptive analysis and trade-off evaluations between energy efficiency, performance, and reliability were performed. The findings demonstrate the feasibility of sub-threshold designs in achieving substantial power savings without compromising functional reliability, particularly for resource-constrained IoT environments. The paper concludes with practical design guidelines to enable scalable and cost-effective implementation in real-world IoT devices.